Seeking an entry (0+ years) to mid-level (5+ years) FPGA Design Engineer with strong analog electronics skills.
Must have familiarity with HDL, Python and C. Xilinx MP SoC experience preferred. Must have working knowledge of MS Windows and Linux.
Preferred Educational Requirements:
Minimum Education BSEE with a Control Systems or Digital Signal Processing focus.
Minimum Education Engineering Physics with CS or EE minor.
Minimum Educational Requirements:
BS or BA in Electrical Engineering, Physics, Applied Math or Engineering Physics.
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